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Qing Li and Carolyn Yao
Real-Time Concepts for Embedded Systems
Preface
Audience for this Book
Acknowledgments
Chapter 1: Introduction
Overview
1.1 Real Life Examples of Embedded Systems
1.1.1 Embedded Systems in the Home Environment
1.1.2 Embedded Systems in the Work Environment
1.1.3 Embedded Systems in Leisure Activities
1.1.4 Defining the Embedded System
1.1.5 Embedded Processor and Application Awareness
1.1.6 Hardware and Software Co-Design Model
1.1.7 Cross-Platform Development
1.1.8 Software Storage and Upgradeability
1.2 Real-Time Embedded Systems
1.2.1 Real-Time Systems
1.2.2 Characteristics of Real-Time Systems
1.2.3 Hard and Soft Real-Time Systems
1.3 The Future of Embedded Systems
1.4 Points to Remember
Chapter 2: Basics Of Developing For Embedded Systems
2.1 Introduction
2.2 Overview of Linkers and the Linking Process
2.3 Executable and Linking Format
2.4 Mapping Executable Images into Target Embedded Systems
2.4.1 Linker Command File
2.4.2 Mapping Executable Images
2.4.3 Example in Practice
2.5 Points to Remember
Chapter 3: Embedded System Initialization
3.1 Introduction
3.2 Target System Tools and Image Transfer
3.2.1 Embedded Loader
3.2.2 Embedded Monitor
3.2.3 Target Debug Agent
3.3 Target Boot Scenarios
3.3.1 Executing from ROM Using RAM for Data
3.3.2 Executing from RAM after Image Transfer from ROM
3.3.3 Executing from RAM after Image Transfer from Host
3.4 Target System Software Initialization Sequence
3.4.1 Hardware Initialization
3.4.2 RTOS Initialization
3.4.3 Application Software Initialization
3.5 On-Chip Debugging
3.6 Points to Remember
Chapter 4: Introduction To Real-Time Operating Systems
4.1 Introduction
4.2 A Brief History of Operating Systems
4.3 Defining an RTOS
4.4 The Scheduler
4.4.1 Schedulable Entities
4.4.2 Multitasking
4.4.3 The Context Switch
4.4.4 The Dispatcher
4.4.5 Scheduling Algorithms
4.5 Objects
4.6 Services
4.7 Key Characteristics of an RTOS
4.7.1 Reliability
4.7.2 Predictability
4.7.3 Performance
4.7.4 Compactness
4.7.5 Scalability
4.8 Points to Remember
Chapter 5: Tasks
5.1 Introduction
5.2 Defining a Task
5.3 Task States and Scheduling
5.3.1 Ready State
5.3.2 Running State
5.3.3 Blocked State
5.4 Typical Task Operations
5.4.1 Task Creation and Deletion
5.4.2 Task Scheduling
5.4.3 Obtaining Task Information
5.5 Typical Task Structure
5.5.1 Run-to-Completion Tasks
5.5.2 Endless-Loop Tasks
5.6 Synchronization, Communication, and Concurrency
5.7 Points to Remember
Chapter 6: Semaphores
6.1 Introduction
6.2 Defining Semaphores
6.2.1 Binary Semaphores
6.2.2 Counting Semaphores
6.2.3 Mutual Exclusion (Mutex) Semaphores
6.3 Typical Semaphore Operations
6.3.1 Creating and Deleting Semaphores
6.3.2 Acquiring and Releasing Semaphores
6.3.3 Clearing Semaphore Task-Waiting Lists
6.3.4 Getting Semaphore Information
6.4 Typical Semaphore Use
6.4.1 Wait-and-Signal Synchronization
6.4.2 Multiple-Task Wait-and-Signal Synchronization
6.4.3 Credit-Tracking Synchronization
6.4.4 Single Shared-Resource-Access Synchronization
6.4.5 Recursive Shared-Resource-Access Synchronization
6.4.6 Multiple Shared-Resource-Access Synchronization
6.5 Points to Remember
Chapter 7: Message Queues
7.1 Introduction
7.2 Defining Message Queues
7.3 Message Queue States
7.4 Message Queue Content
7.5 Message Queue Storage
7.5.1 System Pools
7.5.2 Private Buffers
7.6 Typical Message Queue Operations
7.6.1 Creating and Deleting Message Queues
7.6.2 Sending and Receiving Messages
7.6.3 Obtaining Message Queue Information
7.7 Typical Message Queue Use
7.7.1 Non-Interlocked, One-Way Data Communication
7.7.2 Interlocked, One-Way Data Communication
7.7.3 Interlocked, Two-Way Data Communication
7.7.4 Broadcast Communication
7.8 Points to Remember
Chapter 8: Other Kernel Objects
8.1 Introduction
8.2 Pipes
8.2.1 Pipe Control Blocks
8.2.2 Pipe States
8.2.3 Named and Unnamed Pipes
8.2.4 Typical Pipe Operations
8.2.5 Typical Uses of Pipes
8.3 Event Registers
8.3.1 Event Register Control Blocks
8.3.2 Typical Event Register Operations
8.3.3 Typical Uses of Event Registers
8.4 Signals
8.4.1 Signal Control Blocks
8.4.2 Typical Signal Operations
8.4.3 Typical Uses of Signals
8.5 Condition Variables
8.5.1 Condition Variable Control Blocks
8.5.2 Typical Condition Variable Operations
8.5.3 Typical Uses of Condition Variables
8.6 Points to Remember
Chapter 9: Other RTOS Services
9.1 Introduction
9.2 Other Building Blocks
9.2.1 TCP/IP Protocol Stack
9.2.2 File System Component
9.2.3 Remote Procedure Call Component
9.2.4 Command Shell
9.2.5 Target Debug Agent
9.2.6 Other Components
9.3 Component Configuration
9.4 Points to Remember
Chapter 10: Exceptions and Interrupts
10.1 Introduction
10.2 What are Exceptions and Interrupts?
10.3 Applications of Exceptions and Interrupts
10.3.1 Internal Errors and Special Conditions Management
10.3.2 Hardware Concurrency and Service Request Management
10.4 A Closer Look at Exceptions and Interrupts
10.4.1 Programmable Interrupt Controllers and External Interrupts
10.4.2 Classification of General Exceptions
10.4.3 General Exception Priorities
10.5 Processing General Exceptions
10.5.1 Installing Exception Handlers
10.5.2 Saving Processor States
10.5.3 Loading and Invoking Exception Handlers
10.5.4 Nested Exceptions and Stack Overflow
10.5.5 Exception Handlers
10.6 The Nature of Spurious Interrupts
10.7 Points to Remember
Chapter 11: Timer and Timer Services
11.1 Introduction
11.2 Real-Time Clocks and System Clocks
11.3 Programmable Interval Timers
11.4 Timer Interrupt Service Routines
11.5 A Model for Implementing the Soft-Timer Handling Facility
11.5.1 Possible Processing Delays
11.5.2 Implementation Considerations
11.6 Timing Wheels
11.6.1 Issues
11.6.2 Hierarchical Timing Wheels
11.7 Soft Timers and Timer Related Operations
11.8 Points to Remember
Chapter 12: I/O Subsystem
12.1 Introduction
12.2 Basic I/O Concepts
12.2.1 Port-Mapped vs. Memory-Mapped I/O and DMA
12.2.2 Character-Mode vs. Block-Mode Devices
12.3 The I/O Subsystem
12.3.1 Standard I/O Functions
12.3.2 Mapping Generic Functions to Driver Functions
12.3.3 Associating Devices with Device Drivers
12.4 Points to Remember
Chapter 13: Memory Management
13.1 Introduction
13.2 Dynamic Memory Allocation in Embedded Systems
13.2.1 Memory Fragmentation and Compaction
13.2.2 An Example of malloc and free
13.2.3 Finding Free Blocks Quickly
13.2.4 The free Operation
13.3 Fixed-Size Memory Management in Embedded Systems
13.4 Blocking vs. Non-Blocking Memory Functions
13.5 Hardware Memory Management Units
13.6 Points to Remember
Chapter 14: Modularizing An Application For Concurrency
14.1 Introduction
14.2 An Outside-In Approach to Decomposing Applications
14.3 Guidelines and Recommendations for Identifying Concurrency
14.3.1 Units of Concurrency
14.3.2 Pseudo versus True Concurrent Execution
14.3.3 Some Guidelines
14.4 Schedulability Analysis-Rate Monotonic Analysis
14.4.1 Basic RMA Schedulability Test
14.4.2 Extended RAM Schedulability Test
14.5 Points to Remember
Chapter 15: Synchronization And Communication
15.1 Introduction
15.2 Synchronization
15.2.1 Resource Synchronization
15.2.2 Activity Synchronization
15.2.3 Implementing Barriers
15.3 Communication
15.4 Resource Synchronization Methods
15.4.1 Interrupt Locks
15.4.2 Preemption Locks
15.5 Critical Section Revisited
15.6 Common Practical Design Patterns
15.6.1 Synchronous Activity Synchronization
15.6.2 Asynchronous Event Notification Using Signals
15.6.3 Resource Synchronization
15.7 Specific Solution Design Patterns
15.7.1 Data Transfer with Flow Control
15.7.2 Asynchronous Data Reception from Multiple Data Communication Channels
15.7.3 Multiple Input Communication Channels
15.7.4 Using Condition Variables to Synchronize between Readers and Writers
15.7.5 Sending High Priority Data between Tasks
15.7.6 Implementing Reader-Writer Locks Using Condition Variables
15.8 Points to Remember
Chapter 16: Common Design Problems
16.1 Introduction
16.2 Resource Classification
16.3 Deadlocks
16.3.1 Resource Request Models
16.3.2 Deadlock Detection
16.3.3 Deadlock Recovery
16.3.4 Deadlock Avoidance
16.3.5 Deadlock Prevention
16.4 Priority Inversion
16.4.1 Priority Inheritance Protocol
16.4.2 Ceiling Priority Protocol
16.4.3 Priority Ceiling Protocol
16.5 Points to Remember
Appendix A: References
